Exemplary embodiments relate to a semiconductor memory device, and more particularly, to a memory device, a memory system including the same, and a slew rate calibration method thereof.
According to a mobile trend, high integration, high performance, and low power are desirable for semiconductor memory devices. As a high-performance memory device operates at a very high speed, higher signal quality and stability are desirable. Using a termination resistor is one of methods for the high signal quality and stability.
The termination resistor is an element for impedance matching between the inside and the outside of the memory system to reduce reflection of a data signal and to prevent a decrease in quality of the data signal. A termination circuit that includes the termination resistor may be mainly used in a dynamic random access memory (DRAM) that operates at a high speed. In recent years, an on-die termination technology for locating the termination resistor to the inside of the DRAM has been used to prevent signal interference between DRAMs.
Memory devices are desirable to support various signaling schemes for satisfying various standards or interfaces upon communicating with a host. The standards or interfaces may define an on-die termination scheme and an output resistance value of a memory device. As such, memory devices may be designed to provide various output resistance values. With the above description, memory devices drive various on-die termination schemes and maintain the quality of output data while providing an output resistance value that a system needs.